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Android-ready module builds on FPGA-enabled Cortex-A9 SoC
2011-03-11 Article Rating:   / 2
iVeia announced what appears to be the first computer-on-module (COM) based on Xilinx' FPGA-enabled Cortex-A9 system-on-chip. Featuring a Zynq-7020 with dual cores clocked to 800MHz, the Atlas-I-Z7e offers 512MB of LPDDR2 memory, microSD and USB 2.0 expansion, Linux and Android support, "extremely low power" sleep modes, and measures just 3.37 x 1.25 x 0.25 inches, says the company.
Before getting carried away with the possibilities of an FPGA-imbued, dual-core Cortex-A9 processor that can run Linux and Android, note that iVeia's Atlas-I-27e module won't start sampling until the fourth quarter, and won't ship in production quantities until 2012. This more or less follows the schedule for Xilinx' first two Zynq-7000 devices, the Zynq-7010 and Zynq-7020, announced earlier this month. However, customers interested in the module and its development framework can get a head start by developing now on iVeia's Atlas-I-LPe module, the company says. (See farther below for more information on these existing products.)  Atlas-I-Z7e The 3.37 x 1.25 x 0.25-inch module runs on 3.3 VDC power, and offers support for a wide temperature range, preliminarily slated for -40 to 185 deg. F (-40 to 85 deg. C), says iVeia. The board offers power management features including smart clocking, power plane control, and "extremely low power sleep modes," says the company. The Atlas-I-Z7e features a "low-profile mezzanine style I/O interface," with up to 56 I/O pins in dual high-speed connectors that are designed to hook up to Atlas-compatible carrier boards, says iVeia. Each bank has its own I/O voltage controls, and is said to be designed to withstand "stringent environmental, vibration, and signal integrity standards." The connectors are user configurable via the Zynq's FPGA (field programmable gate array) interface, says the company. The I/O interface also offers compatibility with other Iveia Atlas processing modules and an array of glueless peripheral expansion options, including soft peripherals from iVeia and Xilinx.  The Atlas-I-Z7e measures just 3.37 x 1.25 x 0.25 inches (Click to enlarge) In an EEtimes video interview from Embedded World earlier this month, iVeia CTO Michael Fawcett says he is particularly interested in the possibilities of integrating Android with FPGA capabilities. "We've been seeing Android requests for proposals in interesting sectors like military radios and other handheld devices, most of them in industrial applications," says Fawcett. Velocity-EHF and Atlas-I-LPe The Atlas-I-Z7e supports iVeia's Velocity Embedded Hybrid Framework (Velocity-EHF), a portability layer offered with all Iveia modules. According to the company, one of its customers recently used Velocity-EHF to port an application in a single day from iVeia's Titan-V5e, a module, which includes a PowerPC-based Virtex-5 FPGA, to its Atlas-I-LPe module, the device that the company recommends for preliminary Atlas-I-Z7e development. The Linux-ready Atlas-I-LPe module combines a Texas Instruments Cortex-A8 based OMAP3525 SoC with a Xilinx Spartan 6LX16 FPGA. The module also offers 512MB or 1GB of LPDDR memory, and microSD expansion. Xilinx Zynq-7020 background Announced earlier this month, the Zynq-7000 devices integrate dual 800MHz ARM Cortex-A9 cores with 28nm-fabricated, low-power programmable logic derived from the Xilinx Artix7 (Zynq-7010 and Zynq-7020) and higher-end Kintex-7 (Zynq-7030 and Zynq-7040) FPGA technologies. Billed as the industry's first Extensible Processing Platform (EPP), the Zynq targets high-end markets such as video surveillance, automotive driver assistance, and factory automation, among others. PowerPC-based processors have been integrated in a number of Xilinx' FPGA processors. However, the Zynq is the company's first FPGA processor that integrates an ARM processor. It is also the first FPGA/application processor hybrid that boots at power-up and can run a variety of operating systems independent of the programmable logic, says Xilinx.  Zynq-7000 block diagram (Click to enlarge) The Zynq-7000 SoCs incorporate ARM dual-core Cortex-A9 cores with MPCore technology and integrated Neon and double precision floating point engines. The SoCs also include 32KB/32KB L1 and 512KB L2 caches, plus 256KB memory on-chip. A variety of memory controllers including DDR3 and NAND flash are also provided. The extensive I/O support, meanwhile, ranges from gigabit Ethernet to CAN to I2C, according to Xilinx. A high-bandwidth AMBA4 "Advanced Extensible Interface" (AXI4) interconnect between the processing system and the programmable logic enables multi-gigabit data transfers at very low power, says Xilinx. The interconnect is said to reduce performance bottlenecks for control, data, I/O, and memory. Built on nine AXI interfaces, the interconnect is said to offer numerous control signals, representing more than 3,000 interconnections. The interconnect enables designers to build their own custom devices by adding peripherals in the programmable logic. It is also touted as enabling designers to increase overall performance by partitioning hardware and software functions via custom accelerators. Availability Live demos of the Atlas-I-Z7e will launch in Q4 2011, with production availability in 2012, says iVeia. Customers interested in the Atlas-I-Z7e and the Velocity-EHF can begin development now on iVeia's Atlas-I-LPe. More information may be found on iVeia's Atlas-I-Z7e page. Related Stories:
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